#include <linux/version.h>#include <linux/config.h>#include <linux/init.h>#include <asm/cprefix.h>#include <asm/head.h>#include <asm/asi.h>#include <asm/contregs.h>#include <asm/ptrace.h>#include <asm/psr.h>#include <asm/page.h>#include <asm/kdebug.h>#include <asm/winmacro.h>#include <asm/errno.h>Include dependency graph for sparc/kernel/head.S:
Go to the source code of this file.
Defines | |
| #define | SUN4D_BOOTBUS_CPUID 0xf0140000 |
| #define | PATCH_IT(dst, src) |
| #define | PATCH_INSN(src, dest) |
Functions | |
| t_tflt bad_instruction priv_instruction fpd_trap_handler mna_handler fpe_trap_handler do_tag_overflow do_watchpoint do_reg_access do_cp_disabled unimp_flush do_cp_exception do_hw_divzero do_hw_divzero do_flush_windows | C_LABEL (pg1) |
| t_tflt bad_instruction priv_instruction fpd_trap_handler mna_handler fpe_trap_handler do_tag_overflow do_watchpoint do_reg_access do_cp_disabled unimp_flush do_cp_exception do_hw_divzero do_hw_divzero do_flush_windows | C_LABEL (pg2) |
| t_tflt bad_instruction priv_instruction fpd_trap_handler mna_handler fpe_trap_handler do_tag_overflow do_watchpoint do_reg_access do_cp_disabled unimp_flush do_cp_exception do_hw_divzero do_hw_divzero do_flush_windows C_LABEL(pg3).globl C_LABEL(empty_bad_page).globl C_LABEL(empty_bad_page_table).globl C_LABEL(empty_zero_page).globl C_LABEL(swapper_pg_dir) C_LABEL(swapper_pg_dir) cmp x0 be sun4c_remap A sun4c MMU or normal Sun4 nop g2 rd g3 and g3 subcc g0 bz srmmu_nviking nop set g2 lda | hi [%g0] g3 peek in the control reg and g3 subcc g0 bnz srmmu_nviking is in mbus mode nop rd g3 DO NOT TOUCH g3 andn g2 wr psr WRITE_PAUSE set g4 lda[%g4] g4 sll g4 We use this below DO NOT TOUCH g4 lda[%g0] g5 DO NOT TOUCH g5 set g6 AC bit mask or g6 Or it in sta ASI_M_MMUREGS Close your eyes lda[%g4] o1 This is a level ptr srl o1 Clear low bits sll o1 Make physical lda[%o1] o2 This is the x0 MB pgd add o3 sta ASI_M_BYPASS sta ASI_M_MMUREGS POW ouch wr psr tick tick tock WRITE_PAUSE b go_to_highmem nop g1 lda[%g1] g1 get ctx table ptr sll g1 make physical addr lda[%g1] g1 ptr to level pg_table srl g1 sll g1 make phys addr for l1 tbl lda[%g1] g2 get level1 entry for x0 add g3 XXX AWAY WITH EMPIRICALS sta ASI_M_BYPASS place at KERNBASE entry b go_to_highmem nop wheee g3 source base sethi g4 destination base or g4 sethi(0x300000) |
| t_tflt bad_instruction priv_instruction fpd_trap_handler mna_handler fpe_trap_handler do_tag_overflow do_watchpoint do_reg_access do_cp_disabled unimp_flush do_cp_exception do_hw_divzero do_hw_divzero do_flush_windows C_LABEL(pg3).globl C_LABEL(empty_bad_page).globl C_LABEL(empty_bad_page_table).globl C_LABEL(empty_zero_page).globl C_LABEL(swapper_pg_dir) C_LABEL(swapper_pg_dir) cmp x0 be sun4c_remap A sun4c MMU or normal Sun4 nop g2 rd g3 and g3 subcc g0 bz srmmu_nviking nop set g2 lda | lo [%g0] g3 peek in the control reg and g3 subcc g0 bnz srmmu_nviking is in mbus mode nop rd g3 DO NOT TOUCH g3 andn g2 wr psr WRITE_PAUSE set g4 lda[%g4] g4 sll g4 We use this below DO NOT TOUCH g4 lda[%g0] g5 DO NOT TOUCH g5 set g6 AC bit mask or g6 Or it in sta ASI_M_MMUREGS Close your eyes lda[%g4] o1 This is a level ptr srl o1 Clear low bits sll o1 Make physical lda[%o1] o2 This is the x0 MB pgd add o3 sta ASI_M_BYPASS sta ASI_M_MMUREGS POW ouch wr psr tick tick tock WRITE_PAUSE b go_to_highmem nop g1 lda[%g1] g1 get ctx table ptr sll g1 make physical addr lda[%g1] g1 ptr to level pg_table srl g1 sll g1 make phys addr for l1 tbl lda[%g1] g2 get level1 entry for x0 add g3 XXX AWAY WITH EMPIRICALS sta ASI_M_BYPASS place at KERNBASE entry b go_to_highmem nop wheee g3 source base sethi g4 destination base or g4 sethi g5 or(0x300000) |
| t_tflt bad_instruction priv_instruction fpd_trap_handler mna_handler fpe_trap_handler do_tag_overflow do_watchpoint do_reg_access do_cp_disabled unimp_flush do_cp_exception do_hw_divzero do_hw_divzero do_flush_windows C_LABEL(pg3).globl C_LABEL(empty_bad_page).globl C_LABEL(empty_bad_page_table).globl C_LABEL(empty_zero_page).globl C_LABEL(swapper_pg_dir) C_LABEL(swapper_pg_dir) cmp x0 be sun4c_remap A sun4c MMU or normal Sun4 nop g2 rd g3 and g3 subcc g0 bz srmmu_nviking nop set g2 lda | hi [%g0] g3 peek in the control reg and g3 subcc g0 bnz srmmu_nviking is in mbus mode nop rd g3 DO NOT TOUCH g3 andn g2 wr psr WRITE_PAUSE set g4 lda[%g4] g4 sll g4 We use this below DO NOT TOUCH g4 lda[%g0] g5 DO NOT TOUCH g5 set g6 AC bit mask or g6 Or it in sta ASI_M_MMUREGS Close your eyes lda[%g4] o1 This is a level ptr srl o1 Clear low bits sll o1 Make physical lda[%o1] o2 This is the x0 MB pgd add o3 sta ASI_M_BYPASS sta ASI_M_MMUREGS POW ouch wr psr tick tick tock WRITE_PAUSE b go_to_highmem nop g1 lda[%g1] g1 get ctx table ptr sll g1 make physical addr lda[%g1] g1 ptr to level pg_table srl g1 sll g1 make phys addr for l1 tbl lda[%g1] g2 get level1 entry for x0 add g3 XXX AWAY WITH EMPIRICALS sta ASI_M_BYPASS place at KERNBASE entry b go_to_highmem nop wheee g3 source base sethi g4 destination base or g4 sethi g5 or g5 upper bound MB or l6 sll l6 Regmap mapping size add g3 Base magic add g4 Base magic g2 Get lower entry stha ASI_REGMAP Store in high entry add g4 Move up high memory ptr subcc g0 Reached our limit blu sun4_mutant_loop loop again add g3 Move up low ptr b go_to_highmem Jump to high memory nop g3 source base set g4 destination base set g5 upper bound MB l6 sll l6 sun4 mmu segmap size g6 load phys_seg stha ASI_SEGMAP stort new virt mapping add g3 increment source pointer subcc g0 reached limit blu sun4_normal_loop loop again add g4 increment dest ptr b go_to_highmem nop g3 source base set g4 destination base set g5 upper bound MB l6 sll l6 sun4c mmu segmap size g6 load phys_seg sta ASI_SEGMAP store new virt mapping add g3 Increment source ptr subcc g0 Reached limit bl sun4c_remap_loop loop again add g4 Increment dest ptr g1 jmpl g0 nop align __INIT o0 put back romvec mov o1 and debug_vec sethi(C_LABEL(prom_vector_p)) |
| t_tflt bad_instruction priv_instruction fpd_trap_handler mna_handler fpe_trap_handler do_tag_overflow do_watchpoint do_reg_access do_cp_disabled unimp_flush do_cp_exception do_hw_divzero do_hw_divzero do_flush_windows C_LABEL(pg3).globl C_LABEL(empty_bad_page).globl C_LABEL(empty_bad_page_table).globl C_LABEL(empty_zero_page).globl C_LABEL(swapper_pg_dir) C_LABEL(swapper_pg_dir) cmp x0 be sun4c_remap A sun4c MMU or normal Sun4 nop g2 rd g3 and g3 subcc g0 bz srmmu_nviking nop set g2 lda | hi [%g0] g3 peek in the control reg and g3 subcc g0 bnz srmmu_nviking is in mbus mode nop rd g3 DO NOT TOUCH g3 andn g2 wr psr WRITE_PAUSE set g4 lda[%g4] g4 sll g4 We use this below DO NOT TOUCH g4 lda[%g0] g5 DO NOT TOUCH g5 set g6 AC bit mask or g6 Or it in sta ASI_M_MMUREGS Close your eyes lda[%g4] o1 This is a level ptr srl o1 Clear low bits sll o1 Make physical lda[%o1] o2 This is the x0 MB pgd add o3 sta ASI_M_BYPASS sta ASI_M_MMUREGS POW ouch wr psr tick tick tock WRITE_PAUSE b go_to_highmem nop g1 lda[%g1] g1 get ctx table ptr sll g1 make physical addr lda[%g1] g1 ptr to level pg_table srl g1 sll g1 make phys addr for l1 tbl lda[%g1] g2 get level1 entry for x0 add g3 XXX AWAY WITH EMPIRICALS sta ASI_M_BYPASS place at KERNBASE entry b go_to_highmem nop wheee g3 source base sethi g4 destination base or g4 sethi g5 or g5 upper bound MB or l6 sll l6 Regmap mapping size add g3 Base magic add g4 Base magic g2 Get lower entry stha ASI_REGMAP Store in high entry add g4 Move up high memory ptr subcc g0 Reached our limit blu sun4_mutant_loop loop again add g3 Move up low ptr b go_to_highmem Jump to high memory nop g3 source base set g4 destination base set g5 upper bound MB l6 sll l6 sun4 mmu segmap size g6 load phys_seg stha ASI_SEGMAP stort new virt mapping add g3 increment source pointer subcc g0 reached limit blu sun4_normal_loop loop again add g4 increment dest ptr b go_to_highmem nop g3 source base set g4 destination base set g5 upper bound MB l6 sll l6 sun4c mmu segmap size g6 load phys_seg sta ASI_SEGMAP store new virt mapping add g3 Increment source ptr subcc g0 Reached limit bl sun4c_remap_loop loop again add g4 Increment dest ptr g1 jmpl g0 nop align __INIT o0 put back romvec mov o1 and debug_vec sethi g1 st sethi(C_LABEL(linux_dbvec)) |
| t_tflt bad_instruction priv_instruction fpd_trap_handler mna_handler fpe_trap_handler do_tag_overflow do_watchpoint do_reg_access do_cp_disabled unimp_flush do_cp_exception do_hw_divzero do_hw_divzero do_flush_windows C_LABEL(pg3).globl C_LABEL(empty_bad_page).globl C_LABEL(empty_bad_page_table).globl C_LABEL(empty_zero_page).globl C_LABEL(swapper_pg_dir) C_LABEL(swapper_pg_dir) cmp x0 be sun4c_remap A sun4c MMU or normal Sun4 nop g2 rd g3 and g3 subcc g0 bz srmmu_nviking nop set g2 lda | hi [%g0] g3 peek in the control reg and g3 subcc g0 bnz srmmu_nviking is in mbus mode nop rd g3 DO NOT TOUCH g3 andn g2 wr psr WRITE_PAUSE set g4 lda[%g4] g4 sll g4 We use this below DO NOT TOUCH g4 lda[%g0] g5 DO NOT TOUCH g5 set g6 AC bit mask or g6 Or it in sta ASI_M_MMUREGS Close your eyes lda[%g4] o1 This is a level ptr srl o1 Clear low bits sll o1 Make physical lda[%o1] o2 This is the x0 MB pgd add o3 sta ASI_M_BYPASS sta ASI_M_MMUREGS POW ouch wr psr tick tick tock WRITE_PAUSE b go_to_highmem nop g1 lda[%g1] g1 get ctx table ptr sll g1 make physical addr lda[%g1] g1 ptr to level pg_table srl g1 sll g1 make phys addr for l1 tbl lda[%g1] g2 get level1 entry for x0 add g3 XXX AWAY WITH EMPIRICALS sta ASI_M_BYPASS place at KERNBASE entry b go_to_highmem nop wheee g3 source base sethi g4 destination base or g4 sethi g5 or g5 upper bound MB or l6 sll l6 Regmap mapping size add g3 Base magic add g4 Base magic g2 Get lower entry stha ASI_REGMAP Store in high entry add g4 Move up high memory ptr subcc g0 Reached our limit blu sun4_mutant_loop loop again add g3 Move up low ptr b go_to_highmem Jump to high memory nop g3 source base set g4 destination base set g5 upper bound MB l6 sll l6 sun4 mmu segmap size g6 load phys_seg stha ASI_SEGMAP stort new virt mapping add g3 increment source pointer subcc g0 reached limit blu sun4_normal_loop loop again add g4 increment dest ptr b go_to_highmem nop g3 source base set g4 destination base set g5 upper bound MB l6 sll l6 sun4c mmu segmap size g6 load phys_seg sta ASI_SEGMAP store new virt mapping add g3 Increment source ptr subcc g0 Reached limit bl sun4c_remap_loop loop again add g4 Increment dest ptr g1 jmpl g0 nop align __INIT o0 put back romvec mov o1 and debug_vec sethi g1 st sethi g1 st o3 and o5 get the version cmp x2 a v2 prom be found_version nop cmp x3 a v3 prom be found_version nop set g6 cmp g6 an old sun4 be sun4_init nop l1 l0 l0 call l0 or o0 g6 sethi(C_LABEL(cputypvar)) |
| t_tflt bad_instruction priv_instruction fpd_trap_handler mna_handler fpe_trap_handler do_tag_overflow do_watchpoint do_reg_access do_cp_disabled unimp_flush do_cp_exception do_hw_divzero do_hw_divzero do_flush_windows C_LABEL(pg3).globl C_LABEL(empty_bad_page).globl C_LABEL(empty_bad_page_table).globl C_LABEL(empty_zero_page).globl C_LABEL(swapper_pg_dir) C_LABEL(swapper_pg_dir) cmp x0 be sun4c_remap A sun4c MMU or normal Sun4 nop g2 rd g3 and g3 subcc g0 bz srmmu_nviking nop set g2 lda | lo [%g0] g3 peek in the control reg and g3 subcc g0 bnz srmmu_nviking is in mbus mode nop rd g3 DO NOT TOUCH g3 andn g2 wr psr WRITE_PAUSE set g4 lda[%g4] g4 sll g4 We use this below DO NOT TOUCH g4 lda[%g0] g5 DO NOT TOUCH g5 set g6 AC bit mask or g6 Or it in sta ASI_M_MMUREGS Close your eyes lda[%g4] o1 This is a level ptr srl o1 Clear low bits sll o1 Make physical lda[%o1] o2 This is the x0 MB pgd add o3 sta ASI_M_BYPASS sta ASI_M_MMUREGS POW ouch wr psr tick tick tock WRITE_PAUSE b go_to_highmem nop g1 lda[%g1] g1 get ctx table ptr sll g1 make physical addr lda[%g1] g1 ptr to level pg_table srl g1 sll g1 make phys addr for l1 tbl lda[%g1] g2 get level1 entry for x0 add g3 XXX AWAY WITH EMPIRICALS sta ASI_M_BYPASS place at KERNBASE entry b go_to_highmem nop wheee g3 source base sethi g4 destination base or g4 sethi g5 or g5 upper bound MB or l6 sll l6 Regmap mapping size add g3 Base magic add g4 Base magic g2 Get lower entry stha ASI_REGMAP Store in high entry add g4 Move up high memory ptr subcc g0 Reached our limit blu sun4_mutant_loop loop again add g3 Move up low ptr b go_to_highmem Jump to high memory nop g3 source base set g4 destination base set g5 upper bound MB l6 sll l6 sun4 mmu segmap size g6 load phys_seg stha ASI_SEGMAP stort new virt mapping add g3 increment source pointer subcc g0 reached limit blu sun4_normal_loop loop again add g4 increment dest ptr b go_to_highmem nop g3 source base set g4 destination base set g5 upper bound MB l6 sll l6 sun4c mmu segmap size g6 load phys_seg sta ASI_SEGMAP store new virt mapping add g3 Increment source ptr subcc g0 Reached limit bl sun4c_remap_loop loop again add g4 Increment dest ptr g1 jmpl g0 nop align __INIT o0 put back romvec mov o1 and debug_vec sethi g1 st sethi g1 st o3 and o5 get the version cmp x2 a v2 prom be found_version nop cmp x3 a v3 prom be found_version nop set g6 cmp g6 an old sun4 be sun4_init nop l1 l0 l0 call l0 or o0 g6 sethi o1 First node has cpu arch or(C_LABEL(cputypvar)) |
| t_tflt bad_instruction priv_instruction fpd_trap_handler mna_handler fpe_trap_handler do_tag_overflow do_watchpoint do_reg_access do_cp_disabled unimp_flush do_cp_exception do_hw_divzero do_hw_divzero do_flush_windows C_LABEL(pg3).globl C_LABEL(empty_bad_page).globl C_LABEL(empty_bad_page_table).globl C_LABEL(empty_zero_page).globl C_LABEL(swapper_pg_dir) C_LABEL(swapper_pg_dir) cmp x0 be sun4c_remap A sun4c MMU or normal Sun4 nop g2 rd g3 and g3 subcc g0 bz srmmu_nviking nop set g2 lda | hi [%g0] g3 peek in the control reg and g3 subcc g0 bnz srmmu_nviking is in mbus mode nop rd g3 DO NOT TOUCH g3 andn g2 wr psr WRITE_PAUSE set g4 lda[%g4] g4 sll g4 We use this below DO NOT TOUCH g4 lda[%g0] g5 DO NOT TOUCH g5 set g6 AC bit mask or g6 Or it in sta ASI_M_MMUREGS Close your eyes lda[%g4] o1 This is a level ptr srl o1 Clear low bits sll o1 Make physical lda[%o1] o2 This is the x0 MB pgd add o3 sta ASI_M_BYPASS sta ASI_M_MMUREGS POW ouch wr psr tick tick tock WRITE_PAUSE b go_to_highmem nop g1 lda[%g1] g1 get ctx table ptr sll g1 make physical addr lda[%g1] g1 ptr to level pg_table srl g1 sll g1 make phys addr for l1 tbl lda[%g1] g2 get level1 entry for x0 add g3 XXX AWAY WITH EMPIRICALS sta ASI_M_BYPASS place at KERNBASE entry b go_to_highmem nop wheee g3 source base sethi g4 destination base or g4 sethi g5 or g5 upper bound MB or l6 sll l6 Regmap mapping size add g3 Base magic add g4 Base magic g2 Get lower entry stha ASI_REGMAP Store in high entry add g4 Move up high memory ptr subcc g0 Reached our limit blu sun4_mutant_loop loop again add g3 Move up low ptr b go_to_highmem Jump to high memory nop g3 source base set g4 destination base set g5 upper bound MB l6 sll l6 sun4 mmu segmap size g6 load phys_seg stha ASI_SEGMAP stort new virt mapping add g3 increment source pointer subcc g0 reached limit blu sun4_normal_loop loop again add g4 increment dest ptr b go_to_highmem nop g3 source base set g4 destination base set g5 upper bound MB l6 sll l6 sun4c mmu segmap size g6 load phys_seg sta ASI_SEGMAP store new virt mapping add g3 Increment source ptr subcc g0 Reached limit bl sun4c_remap_loop loop again add g4 Increment dest ptr g1 jmpl g0 nop align __INIT o0 put back romvec mov o1 and debug_vec sethi g1 st sethi g1 st o3 and o5 get the version cmp x2 a v2 prom be found_version nop cmp x3 a v3 prom be found_version nop set g6 cmp g6 an old sun4 be sun4_init nop l1 l0 l0 call l0 or o0 g6 sethi o1 First node has cpu arch or o1 sethi(C_LABEL(cputypval)) |
| t_tflt bad_instruction priv_instruction fpd_trap_handler mna_handler fpe_trap_handler do_tag_overflow do_watchpoint do_reg_access do_cp_disabled unimp_flush do_cp_exception do_hw_divzero do_hw_divzero do_flush_windows C_LABEL(pg3).globl C_LABEL(empty_bad_page).globl C_LABEL(empty_bad_page_table).globl C_LABEL(empty_zero_page).globl C_LABEL(swapper_pg_dir) C_LABEL(swapper_pg_dir) cmp x0 be sun4c_remap A sun4c MMU or normal Sun4 nop g2 rd g3 and g3 subcc g0 bz srmmu_nviking nop set g2 lda | lo [%g0] g3 peek in the control reg and g3 subcc g0 bnz srmmu_nviking is in mbus mode nop rd g3 DO NOT TOUCH g3 andn g2 wr psr WRITE_PAUSE set g4 lda[%g4] g4 sll g4 We use this below DO NOT TOUCH g4 lda[%g0] g5 DO NOT TOUCH g5 set g6 AC bit mask or g6 Or it in sta ASI_M_MMUREGS Close your eyes lda[%g4] o1 This is a level ptr srl o1 Clear low bits sll o1 Make physical lda[%o1] o2 This is the x0 MB pgd add o3 sta ASI_M_BYPASS sta ASI_M_MMUREGS POW ouch wr psr tick tick tock WRITE_PAUSE b go_to_highmem nop g1 lda[%g1] g1 get ctx table ptr sll g1 make physical addr lda[%g1] g1 ptr to level pg_table srl g1 sll g1 make phys addr for l1 tbl lda[%g1] g2 get level1 entry for x0 add g3 XXX AWAY WITH EMPIRICALS sta ASI_M_BYPASS place at KERNBASE entry b go_to_highmem nop wheee g3 source base sethi g4 destination base or g4 sethi g5 or g5 upper bound MB or l6 sll l6 Regmap mapping size add g3 Base magic add g4 Base magic g2 Get lower entry stha ASI_REGMAP Store in high entry add g4 Move up high memory ptr subcc g0 Reached our limit blu sun4_mutant_loop loop again add g3 Move up low ptr b go_to_highmem Jump to high memory nop g3 source base set g4 destination base set g5 upper bound MB l6 sll l6 sun4 mmu segmap size g6 load phys_seg stha ASI_SEGMAP stort new virt mapping add g3 increment source pointer subcc g0 reached limit blu sun4_normal_loop loop again add g4 increment dest ptr b go_to_highmem nop g3 source base set g4 destination base set g5 upper bound MB l6 sll l6 sun4c mmu segmap size g6 load phys_seg sta ASI_SEGMAP store new virt mapping add g3 Increment source ptr subcc g0 Reached limit bl sun4c_remap_loop loop again add g4 Increment dest ptr g1 jmpl g0 nop align __INIT o0 put back romvec mov o1 and debug_vec sethi g1 st sethi g1 st o3 and o5 get the version cmp x2 a v2 prom be found_version nop cmp x3 a v3 prom be found_version nop set g6 cmp g6 an old sun4 be sun4_init nop l1 l0 l0 call l0 or o0 g6 sethi o1 First node has cpu arch or o1 sethi o2 the string or(C_LABEL(cputypval)) |
| t_tflt bad_instruction priv_instruction fpd_trap_handler mna_handler fpe_trap_handler do_tag_overflow do_watchpoint do_reg_access do_cp_disabled unimp_flush do_cp_exception do_hw_divzero do_hw_divzero do_flush_windows C_LABEL(pg3).globl C_LABEL(empty_bad_page).globl C_LABEL(empty_bad_page_table).globl C_LABEL(empty_zero_page).globl C_LABEL(swapper_pg_dir) C_LABEL(swapper_pg_dir) cmp x0 be sun4c_remap A sun4c MMU or normal Sun4 nop g2 rd g3 and g3 subcc g0 bz srmmu_nviking nop set g2 lda | hi [%g0] g3 peek in the control reg and g3 subcc g0 bnz srmmu_nviking is in mbus mode nop rd g3 DO NOT TOUCH g3 andn g2 wr psr WRITE_PAUSE set g4 lda[%g4] g4 sll g4 We use this below DO NOT TOUCH g4 lda[%g0] g5 DO NOT TOUCH g5 set g6 AC bit mask or g6 Or it in sta ASI_M_MMUREGS Close your eyes lda[%g4] o1 This is a level ptr srl o1 Clear low bits sll o1 Make physical lda[%o1] o2 This is the x0 MB pgd add o3 sta ASI_M_BYPASS sta ASI_M_MMUREGS POW ouch wr psr tick tick tock WRITE_PAUSE b go_to_highmem nop g1 lda[%g1] g1 get ctx table ptr sll g1 make physical addr lda[%g1] g1 ptr to level pg_table srl g1 sll g1 make phys addr for l1 tbl lda[%g1] g2 get level1 entry for x0 add g3 XXX AWAY WITH EMPIRICALS sta ASI_M_BYPASS place at KERNBASE entry b go_to_highmem nop wheee g3 source base sethi g4 destination base or g4 sethi g5 or g5 upper bound MB or l6 sll l6 Regmap mapping size add g3 Base magic add g4 Base magic g2 Get lower entry stha ASI_REGMAP Store in high entry add g4 Move up high memory ptr subcc g0 Reached our limit blu sun4_mutant_loop loop again add g3 Move up low ptr b go_to_highmem Jump to high memory nop g3 source base set g4 destination base set g5 upper bound MB l6 sll l6 sun4 mmu segmap size g6 load phys_seg stha ASI_SEGMAP stort new virt mapping add g3 increment source pointer subcc g0 reached limit blu sun4_normal_loop loop again add g4 increment dest ptr b go_to_highmem nop g3 source base set g4 destination base set g5 upper bound MB l6 sll l6 sun4c mmu segmap size g6 load phys_seg sta ASI_SEGMAP store new virt mapping add g3 Increment source ptr subcc g0 Reached limit bl sun4c_remap_loop loop again add g4 Increment dest ptr g1 jmpl g0 nop align __INIT o0 put back romvec mov o1 and debug_vec sethi g1 st sethi g1 st o3 and o5 get the version cmp x2 a v2 prom be found_version nop cmp x3 a v3 prom be found_version nop set g6 cmp g6 an old sun4 be sun4_init nop l1 l0 l0 call l0 or o0 g6 sethi o1 First node has cpu arch or o1 sethi o2 the string or o2 l0 compatibility tells l0 that we want sun4x where call l0 x is one nop d or e o2 holds pointer to a buf where above string will get stored by the prom subcc g0 bpos got_prop Got the property nop or o0 sethi(C_LABEL(cputypvar_sun4m)) |
| t_tflt bad_instruction priv_instruction fpd_trap_handler mna_handler fpe_trap_handler do_tag_overflow do_watchpoint do_reg_access do_cp_disabled unimp_flush do_cp_exception do_hw_divzero do_hw_divzero do_flush_windows C_LABEL(pg3).globl C_LABEL(empty_bad_page).globl C_LABEL(empty_bad_page_table).globl C_LABEL(empty_zero_page).globl C_LABEL(swapper_pg_dir) C_LABEL(swapper_pg_dir) cmp x0 be sun4c_remap A sun4c MMU or normal Sun4 nop g2 rd g3 and g3 subcc g0 bz srmmu_nviking nop set g2 lda | lo [%g0] g3 peek in the control reg and g3 subcc g0 bnz srmmu_nviking is in mbus mode nop rd g3 DO NOT TOUCH g3 andn g2 wr psr WRITE_PAUSE set g4 lda[%g4] g4 sll g4 We use this below DO NOT TOUCH g4 lda[%g0] g5 DO NOT TOUCH g5 set g6 AC bit mask or g6 Or it in sta ASI_M_MMUREGS Close your eyes lda[%g4] o1 This is a level ptr srl o1 Clear low bits sll o1 Make physical lda[%o1] o2 This is the x0 MB pgd add o3 sta ASI_M_BYPASS sta ASI_M_MMUREGS POW ouch wr psr tick tick tock WRITE_PAUSE b go_to_highmem nop g1 lda[%g1] g1 get ctx table ptr sll g1 make physical addr lda[%g1] g1 ptr to level pg_table srl g1 sll g1 make phys addr for l1 tbl lda[%g1] g2 get level1 entry for x0 add g3 XXX AWAY WITH EMPIRICALS sta ASI_M_BYPASS place at KERNBASE entry b go_to_highmem nop wheee g3 source base sethi g4 destination base or g4 sethi g5 or g5 upper bound MB or l6 sll l6 Regmap mapping size add g3 Base magic add g4 Base magic g2 Get lower entry stha ASI_REGMAP Store in high entry add g4 Move up high memory ptr subcc g0 Reached our limit blu sun4_mutant_loop loop again add g3 Move up low ptr b |