00001 /******************************************************************************* 00002 * 00003 * (c) 1999 by Computone Corporation 00004 * 00005 ******************************************************************************** 00006 * 00007 * 00008 * PACKAGE: Linux tty Device Driver for IntelliPort II family of multiport 00009 * serial I/O controllers. 00010 * 00011 * DESCRIPTION: Defines, definitions and includes which are heavily dependant 00012 * on O/S, host, compiler, etc. This file is tailored for: 00013 * Linux v2.0.0 and later 00014 * Gnu gcc c2.7.2 00015 * 80x86 architecture 00016 * 00017 *******************************************************************************/ 00018 00019 #ifndef I2OS_H /* To prevent multiple includes */ 00020 #define I2OS_H 1 00021 00022 #define VERSION(ver,rel,seq) (((ver)<<16) | ((rel)<<8) | (seq)) 00023 00024 //------------------------------------------------- 00025 // Required Includes 00026 //------------------------------------------------- 00027 00028 #include "ip2types.h" 00029 #include <asm/io.h> /* For inb, etc */ 00030 00031 //------------------------------------ 00032 // Defines for I/O instructions: 00033 //------------------------------------ 00034 00035 #define INB(port) inb(port) 00036 #define OUTB(port,value) outb((value),(port)) 00037 #define INW(port) inw(port) 00038 #define OUTW(port,value) outw((value),(port)) 00039 #define OUTSW(port,addr,count) outsw((port),(addr),(((count)+1)/2)) 00040 #define OUTSB(port,addr,count) outsb((port),(addr),(((count)+1))&-2) 00041 #define INSW(port,addr,count) insw((port),(addr),(((count)+1)/2)) 00042 #define INSB(port,addr,count) insb((port),(addr),(((count)+1))&-2) 00043 00044 //-------------------------------------------- 00045 // Interrupt control 00046 //-------------------------------------------- 00047 00048 #if LINUX_VERSION_CODE < 0x00020100 00049 typedef int spinlock_t; 00050 #define spin_lock_init() 00051 #define spin_lock(a) 00052 #define spin_unlock(a) 00053 #define spin_lock_irqsave(a,b) {save_flags((b));cli();} 00054 #define spin_unlock_irqrestore(a,b) {restore_flags((b));} 00055 #define write_lock_irqsave(a,b) spin_lock_irqsave(a,b) 00056 #define write_unlock_irqrestore(a,b) spin_unlock_irqrestore(a,b) 00057 #define read_lock_irqsave(a,b) spin_lock_irqsave(a,b) 00058 #define read_unlock_irqrestore(a,b) spin_unlock_irqrestore(a,b) 00059 #endif 00060 00061 //#define SAVE_AND_DISABLE_INTS(a,b) spin_lock_irqsave(a,b) 00062 //#define RESTORE_INTS(a,b) spin_unlock_irqrestore(a,b) 00063 00064 #define LOCK_INIT(a) spin_lock_init(a) 00065 00066 #define SAVE_AND_DISABLE_INTS(a,b) { \ 00067 /* printk("get_lock: 0x%x,%4d,%s\n",(int)a,__LINE__,__FILE__);*/ \ 00068 spin_lock_irqsave(a,b); \ 00069 } 00070 00071 #define RESTORE_INTS(a,b) { \ 00072 /* printk("rel_lock: 0x%x,%4d,%s\n",(int)a,__LINE__,__FILE__);*/ \ 00073 spin_unlock_irqrestore(a,b); \ 00074 } 00075 00076 #define READ_LOCK_IRQSAVE(a,b) { \ 00077 /* printk("get_read_lock: 0x%x,%4d,%s\n",(int)a,__LINE__,__FILE__);*/ \ 00078 read_lock_irqsave(a,b); \ 00079 } 00080 00081 #define READ_UNLOCK_IRQRESTORE(a,b) { \ 00082 /* printk("rel_read_lock: 0x%x,%4d,%s\n",(int)a,__LINE__,__FILE__);*/ \ 00083 read_unlock_irqrestore(a,b); \ 00084 } 00085 00086 #define WRITE_LOCK_IRQSAVE(a,b) { \ 00087 /* printk("get_write_lock: 0x%x,%4d,%s\n",(int)a,__LINE__,__FILE__);*/ \ 00088 write_lock_irqsave(a,b); \ 00089 } 00090 00091 #define WRITE_UNLOCK_IRQRESTORE(a,b) { \ 00092 /* printk("rel_write_lock: 0x%x,%4d,%s\n",(int)a,__LINE__,__FILE__);*/ \ 00093 write_unlock_irqrestore(a,b); \ 00094 } 00095 00096 00097 //------------------------------------------------------------------------------ 00098 // Hardware-delay loop 00099 // 00100 // Probably used in only one place (see i2ellis.c) but this helps keep things 00101 // together. Note we have unwound the IN instructions. On machines with a 00102 // reasonable cache, the eight instructions (1 byte each) should fit in cache 00103 // nicely, and on un-cached machines, the code-fetch would tend not to dominate. 00104 // Note that cx is shifted so that "count" still reflects the total number of 00105 // iterations assuming no unwinding. 00106 //------------------------------------------------------------------------------ 00107 00108 //#define DELAY1MS(port,count,label) 00109 00110 //------------------------------------------------------------------------------ 00111 // Macros to switch to a new stack, saving stack pointers, and to restore the 00112 // old stack (Used, for example, in i2lib.c) "heap" is the address of some 00113 // buffer which will become the new stack (working down from highest address). 00114 // The two words at the two lowest addresses in this stack are for storing the 00115 // SS and SP. 00116 //------------------------------------------------------------------------------ 00117 00118 //#define TO_NEW_STACK(heap,size) 00119 //#define TO_OLD_STACK(heap) 00120 00121 //------------------------------------------------------------------------------ 00122 // Macros to save the original IRQ vectors and masks, and to patch in new ones. 00123 //------------------------------------------------------------------------------ 00124 00125 //#define SAVE_IRQ_MASKS(dest) 00126 //#define WRITE_IRQ_MASKS(src) 00127 //#define SAVE_IRQ_VECTOR(value,dest) 00128 //#define WRITE_IRQ_VECTOR(value,src) 00129 00130 //------------------------------------------------------------------------------ 00131 // Macro to copy data from one far pointer to another. 00132 //------------------------------------------------------------------------------ 00133 00134 #define I2_MOVE_DATA(fpSource,fpDest,count) memmove(fpDest,fpSource,count); 00135 00136 //------------------------------------------------------------------------------ 00137 // Macros to issue eoi's to host interrupt control (IBM AT 8259-style). 00138 //------------------------------------------------------------------------------ 00139 00140 //#define MASTER_EOI 00141 //#define SLAVE_EOI 00142 00143 #endif /* I2OS_H */ 00144 00145