dmascc.c File Reference

#include <linux/module.h>
#include <linux/delay.h>
#include <linux/dmascc.h>
#include <linux/errno.h>
#include <linux/if_arp.h>
#include <linux/in.h>
#include <linux/interrupt.h>
#include <linux/ioport.h>
#include <linux/kernel.h>
#include <linux/mm.h>
#include <linux/netdevice.h>
#include <linux/sockios.h>
#include <linux/tqueue.h>
#include <linux/version.h>
#include <asm/atomic.h>
#include <asm/bitops.h>
#include <asm/dma.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/segment.h>
#include <net/ax25.h>
#include "z8530.h"

Include dependency graph for dmascc.c:

Go to the source code of this file.

Defines
#define	__init
#define	__initdata
#define	__initfunc(x)   x
#define	MODULE_AUTHOR(x)
#define	MODULE_DESCRIPTION(x)
#define	MODULE_PARM(x, y)
#define	copy_to_user(x, y, z)   memcpy_tofs(x,y,z)
#define	copy_from_user(x, y, z)   memcpy_fromfs(x,y,z)
#define	test_and_set_bit(x, y)   set_bit(x,y)
#define	register_netdevice(x)   register_netdev(x)
#define	unregister_netdevice(x)   unregister_netdev(x)
#define	dev_kfree_skb(x)   dev_kfree_skb(x,FREE_WRITE)
#define	SET_DEV_INIT(x)   (x=dmascc_dev_init)
#define	SHDLCE   0x01
#define	AUTOEOM   0x02
#define	RXFIFOH   0x08
#define	TXFIFOE   0x20
#define	NUM_TX_BUF   2
#define	NUM_RX_BUF   2
#define	BUF_SIZE   2016
#define	HW_PI
#define	HW_PI2
#define	HW_TWIN
#define	HARDWARE   { HW_PI, HW_PI2, HW_TWIN }
#define	TYPE_PI   0
#define	TYPE_PI2   1
#define	TYPE_TWIN   2
#define	NUM_TYPES   3
#define	MAX_NUM_DEVS   32
#define	Z8530   0
#define	Z85C30   1
#define	Z85230   2
#define	CHIPNAMES   { "Z8530", "Z85C30", "Z85230" }
#define	SCCB_CMD   0x00
#define	SCCB_DATA   0x01
#define	SCCA_CMD   0x02
#define	SCCA_DATA   0x03
#define	TMR_CNT0   0x00
#define	TMR_CNT1   0x01
#define	TMR_CNT2   0x02
#define	TMR_CTRL   0x03
#define	PI_DREQ_MASK   0x04
#define	TWIN_INT_REG   0x08
#define	TWIN_CLR_TMR1   0x09
#define	TWIN_CLR_TMR2   0x0a
#define	TWIN_SPARE_1   0x0b
#define	TWIN_DMA_CFG   0x08
#define	TWIN_SERIAL_CFG   0x09
#define	TWIN_DMA_CLR_FF   0x0a
#define	TWIN_SPARE_2   0x0b
#define	TWIN_SCC_MSK   0x01
#define	TWIN_TMR1_MSK   0x02
#define	TWIN_TMR2_MSK   0x04
#define	TWIN_INT_MSK   0x07
#define	TWIN_DTRA_ON   0x01
#define	TWIN_DTRB_ON   0x02
#define	TWIN_EXTCLKA   0x04
#define	TWIN_EXTCLKB   0x08
#define	TWIN_LOOPA_ON   0x10
#define	TWIN_LOOPB_ON   0x20
#define	TWIN_EI   0x80
#define	TWIN_DMA_HDX_T1   0x08
#define	TWIN_DMA_HDX_R1   0x0a
#define	TWIN_DMA_HDX_T3   0x14
#define	TWIN_DMA_HDX_R3   0x16
#define	TWIN_DMA_FDX_T3R1   0x1b
#define	TWIN_DMA_FDX_T1R3   0x1d
#define	TX_IDLE   0
#define	TX_OFF   1
#define	TX_TXDELAY   2
#define	TX_ACTIVE   3
#define	TX_SQDELAY   4
Functions
static int	dmascc_dev_init (struct device *dev)
static void	dev_init_buffers (struct device *dev)
int	dmascc_init (void)
	__initfunc (void dmascc_setup(char *str, int *ints))
	__initfunc (int dmascc_init(void))
	__initfunc (int setup_adapter(int io, int h, int n))
static void	write_scc (int ctl, int reg, int val)
static int	read_scc (int ctl, int reg)
static int	scc_open (struct device *dev)
static int	scc_close (struct device *dev)
static int	scc_ioctl (struct device *dev, struct ifreq *ifr, int cmd)
static int	scc_send_packet (struct sk_buff *skb, struct device *dev)
static struct enet_statistics *	scc_get_stats (struct device *dev)
static int	scc_set_mac_address (struct device *dev, void *sa)
static void	scc_isr (int irq, void *dev_id, struct pt_regs *regs)
static void	z8530_isr (struct scc_info *info)
static void	rx_isr (struct device *dev)
static void	special_condition (struct device *dev, int rc)
static void	rx_bh (void *arg)
static void	tx_isr (struct device *dev)
static void	es_isr (struct device *dev)
static void	tm_isr (struct device *dev)
static void	delay (struct device *dev, int t)
static unsigned char	random (void)
Variables
static struct scc_hardware hw[NUM_TYPES]	__initdata = HARDWARE
static struct scc_info *	first = NULL
static unsigned long	rand

---

Define Documentation

#define __init

Definition at line 52 of file dmascc.c.

#define __initdata

Definition at line 53 of file dmascc.c.

#define __initfunc (  x   )     x

Definition at line 54 of file dmascc.c.

#define AUTOEOM   0x02

Definition at line 70 of file dmascc.c. Referenced by init_channel(), and scc_open().

#define BUF_SIZE   2016

Definition at line 104 of file dmascc.c.

#define CHIPNAMES   { "Z8530", "Z85C30", "Z85230" }

Definition at line 132 of file dmascc.c. Referenced by __initfunc().

#define copy_from_user (  x, y, z   )     memcpy_fromfs(x,y,z)

Definition at line 61 of file dmascc.c.

#define copy_to_user (  x, y, z   )     memcpy_tofs(x,y,z)

Definition at line 60 of file dmascc.c.

#define dev_kfree_skb (  x   )     dev_kfree_skb(x,FREE_WRITE)

Definition at line 65 of file dmascc.c. Referenced by __iriap_close(), __irlan_close(), __irlmp_close_lsap(), ace_close(), ace_handle_event(), ace_module_cleanup(), act2000_isa_send(), act2000_sendbuf(), actcapi_dispatch(), am79c961_sendpacket(), arc20020_inthandler(), arc90io_inthandler(), arc90xx_inthandler(), arcnet_send_packet_bad(), arcnetA_send_packet(), arcrimi_inthandler(), ariadne_start_xmit(), arlan_tx(), b1_send_message(), b1dma_dispatch_tx(), Bchan_fill_fifo(), Bchan_xmt_bh(), bif_dma_complete(), bif_intr_runqueue(), bif_rx(), bif_send_ip(), bigmac_clean_rings(), bigmac_start_xmit(), bigmac_tx(), bionet_send_packet(), bmac_close(), bmac_tx_timeout(), bmac_txdma_intr(), bond_xmit(), boomerang_interrupt(), br_dev_drop(), brg_start_xmit(), c4_dispatch_tx(), chk_bcast_mcast_addr(), cisco_netif(), close_2bs0(), close_elsastate(), close_hdlcstate(), close_hfcstate(), close_hfcsx(), close_hscxstate(), close_isarstate(), close_jadestate(), close_tigerstate(), close_w6692state(), closecard(), COMX_send_packet(), comxlapb_rx(), cops_send_packet(), cosa_sppp_tx(), cpc_close(), cpc_net_rx(), cpc_queue_xmit(), cpm_enet_interrupt(), ctc_tx(), dbusy_timer_handler(), DChannel_proc_rcv(), de4x5_free_rx_buffs(), de4x5_free_tx_buffs(), de4x5_tx(), de600_start_xmit(), de620_start_xmit(), depca_start_xmit(), dfx_xmt_done(), dfx_xmt_flush(), dfx_xmt_queue_pkt(), dgrs_start_xmit(), dlci_receive(), dlci_transmit(), dmfe_free_rxbuffer(), dmfe_start_xmit(), dss1up(), dummy_xmit(), eepro_send_packet(), eexp_xmit(), ei_start_xmit(), eicon_idi_manage(), eicon_idi_manage_assign(), eicon_idi_manage_remove(), eicon_io_rcv_dispatch(), eicon_io_transmit(), eicon_putstatus(), el16_send_packet(), el3_start_xmit(), el_start_xmit(), elmc_send_packet(), elp_interrupt(), encode_hdlc(), epic_close(), epic_interrupt(), epp_close(), eql_slave_xmit(), eth16i_tx(), ether1_sendpacket(), ether3_sendpacket(), ethertap_start_xmit(), ewrk3_queue_pkt(), fec_enet_interrupt(), fr_netif(), fr_xmit(), free_rbufs(), free_skb(), free_tbufs(), FreeSkb(), freewin1(), fst_start_xmit(), gmac_close(), gmac_tx_cleanup(), gmac_tx_timeout(), handle_ack(), handle_OCI_interrupt(), happy_meal_clean_rings(), happy_meal_start_xmit(), happy_meal_tx(), HDLC_irq(), hdlc_netif_rx(), hdlcdrv_close(), hdlcdrv_transmitter(), hfc2bds0_interrupt(), hfc_empty_fifo(), hfc_fill_dfifo(), hfc_fill_fifo(), hfcsx_fill_dfifo(), hfcsx_fill_fifo(), hfcsx_interrupt(), HiSax_writebuf_skb(), hp100_clean_txring(), hp100_rx_bm(), hp100_start_xmit(), hscx_interrupt(), hydra_start_xmit(), hysdn_tx_netack(), i596_cleanup_cmd(), i596_handle_CU_completion(), i596_interrupt(), i596_start_xmit(), icc_interrupt(), ICC_l1hw(), icn_free_queue(), icn_pollbchan_send(), icn_sendbuf(), idi_connect_req(), idi_do_req(), idi_handle_ack(), idi_handle_ind(), idi_send_data(), idi_send_udata(), if_readstatus(), if_send(), if_sendbuf(), intr_handler(), ipddp_xmit(), ipgre_tunnel_xmit(), iph5526_send_packet(), ipip6_tunnel_xmit(), ipip_tunnel_xmit(), ircc_hard_xmit(), ircomm_connect_confirm(), ircomm_connect_indication(), ircomm_control_indication(), ircomm_data_indication(), ircomm_disconnect_indication(), ircomm_lmp_data_request(), ircomm_process_data(), ircomm_state_conn(), ircomm_state_idle(), ircomm_state_waiti(), ircomm_state_waitr(), ircomm_ttp_connect_confirm(), ircomm_ttp_connect_indication(), ircomm_ttp_data_request(), ircomm_tty_connect_confirm(), ircomm_tty_connect_indication(), ircomm_tty_control_indication(), ircomm_tty_data_indication(), ircomm_tty_shutdown(), iriap_connect_indication(), iriap_data_indication(), iriap_disconnect_indication(), iriap_getvaluebyclass_confirm(), iriap_getvaluebyclass_indication(), irlan_client_ctrl_disconnect_indication(), irlan_client_state_arb(), irlan_client_state_close(), irlan_client_state_conn(), irlan_client_state_data(), irlan_client_state_idle(), irlan_client_state_info(), irlan_client_state_media(), irlan_client_state_open(), irlan_client_state_query(), irlan_client_state_sync(), irlan_client_state_wait(), irlan_eth_close(), irlan_eth_xmit(), irlan_provider_state_data(), irlan_provider_state_idle(), irlan_provider_state_info(), irlan_provider_state_open(), irlan_run_ctrl_tx_queue(), irlap_compress_frame(), irlap_decompress_frame(), irlap_driver_rcv(), irlap_flush_all_queues(), irlap_recv_discovery_xid_cmd(), irlap_recv_discovery_xid_rsp(), irlap_recv_snrm_cmd(), irlap_recv_test_frame(), irlap_send_data_primary(), irlap_send_data_primary_poll(), irlap_send_data_secondary(), irlap_send_data_secondary_final(), irlap_send_snrm_frame(), irlap_send_ua_response_frame(), irlap_state_conn(), irlap_state_ndm(), irlap_state_nrm_p(), irlap_state_nrm_s(), irlap_state_pclose(), irlap_state_query(), irlap_state_reply(), irlap_state_reset(), irlap_state_reset_check(), irlap_state_reset_wait(), irlap_state_sclose(), irlap_state_setup(), irlap_state_xmit_p(), irlap_state_xmit_s(), irlap_update_nr_received(), irlmp_data_indication(), irlmp_disconnect_indication(), irlmp_link_connect_confirm(), irlmp_link_data_indication(), irlmp_link_disconnect_indication(), irlmp_state_active(), irlmp_state_connect(), irlmp_state_connect_pend(), irlmp_state_disconnected(), irlmp_state_dtr(), irlmp_state_setup(), irlmp_state_setup_pend(), irlmp_state_standby(), irlmp_state_u_connect(), irlmp_udata_indication(), irport_hard_xmit(), IRQ(), irttp_connect_confirm(), irttp_connect_indication(), irttp_data_indication(), irttp_disconnect_indication(), irttp_disconnect_request(), irttp_do_data_indication(), irttp_flush_queues(), irttp_reassemble_skb(), irttp_run_rx_queue(), irttp_udata_indication(), irtty_hard_xmit(), isac_interrupt(), ISAC_l1hw(), isdn_net_start_xmit(), isdn_net_writebuf_skb(), isdn_net_xmit(), isdn_ppp_compress(), isdn_ppp_skb_push(), isdn_ppp_xmit(), isdn_readbchan(), isdn_receive_skb_callback(), isdn_tty_tint(), isdn_v110_decode(), isdn_v110_stat_callback(), isdn_writebuf_skb_stub(), isdn_writebuf_stub(), isdn_x25iface_receive(), isdn_x25iface_xmit(), isdnl2_l3l2(), isdnloop_bchan_send(), isdnloop_sendbuf(), iucv_tx(), jade_interrupt(), kaweth_start_xmit(), l2_pull_iqueue(), l3_1tr6_alert(), l3_1tr6_call_sent(), l3_1tr6_connect(), l3_1tr6_connect_ack(), l3_1tr6_disc(), l3_1tr6_error(), l3_1tr6_info(), l3_1tr6_info_s2(), l3_1tr6_invalid(), l3_1tr6_rel(), l3_1tr6_rel_ack(), l3_1tr6_setup(), l3_1tr6_setup_ack(), l3ni1_SendSpid(), l3ni1_spid_epid(), l3ni1_spid_tout(), lance_interrupt(), lance_purge_ring(), lance_start_xmit(), lcs_txpacket(), lcs_usage_free_drvr_globals(), leased_l1l2(), leased_l4l3(), lldata_handler(), lltrans_handler(), ltpc_xmit(), mac_dma_complete(), mac_drv_clear_rxd(), mac_drv_tx_complete(), mac_process(), mace68k_xmit_start(), mace_clean_rings(), mace_interrupt(), mace_tx_timeout(), mc32_flush_tx_ring(), mc32_send_packet(), mc32_tx_ring(), Memhscx_interrupt(), modem_fill(), myri_clean_rings(), myri_tx(), ncr885e_close(), ncr885e_tx(), ncr885e_tx_timeout(), net_send_packet(), netdev_close(), ni1up(), ni5010_send_packet(), ni52_send_packet(), ni65_close(), ni65_free_buffer(), ni65_lance_reinit(), ni65_send_packet(), ni65_xmit_intr(), no_l3_proto(), nsc_ircc_hard_xmit_fir(), nsc_ircc_hard_xmit_sir(), olympic_arb_cmd(), olympic_close(), olympic_interrupt(), pcbit_l2_err_recover(), pcbit_l2_write(), pcbit_transmit(), pcnet32_close(), pcnet32_interrupt(), pcnet32_purge_tx_ring(), pcnet32_start_xmit(), plip_bh_timeout_error(), plip_close(), plip_send_packet(), poll_active(), ppp_dev_xmit(), process_udp_mgmt_pkt(), pvc_xmit(), qe_start_xmit(), RC_allocate_and_post_buffers(), RCrecv_callback(), RCxmit_callback(), read_fifo(), receive_dmsg(), receive_emsg(), remove_rx_bufs(), rr_close(), rr_interrupt(), rr_start_xmit(), rtl8139_close(), rtl8139_tx_clear(), rx_intr(), sb1000_close(), sb1000_rx(), sb1000_start_xmit(), sbni_drop_tx_queue(), sbni_recv(), sca_intr(), sca_xmit(), scc_discard_buffers(), scc_exint(), scc_net_tx(), scc_send_packet(), scc_txint(), seeq8005_send_packet(), send_complete(), send_frames(), send_queued_packets(), setva(), sgiseeq_start_xmit(), shaper_flush(), shaper_qframe(), shaper_queue_xmit(), sis900_close(), sis900_finish_xmit(), sis900_tx_timeout(), SK_send_packet(), SkDrvEvent(), skfp_close(), skfp_send_pkt(), skmca_tx(), sktr_cancel_tx_queue(), sktr_rcv_status_irq(), sktr_tx_status_irq(), sl_xmit(), smc_hardware_send_packet(), smc_send_packet(), smc_wait_to_send_packet(), sndpkt(), sonic_interrupt(), sonic_send_packet(), sp_xmit(), sppp_tx_done(), state_r_disconnect(), state_s_make_call(), store_udp_mgmt_pkt(), streamer_close(), streamer_init(), streamer_interrupt(), strip_xmit(), sun4c_bigmac_start_xmit(), sun4c_happy_meal_start_xmit(), t1isa_send_message(), tei_l1l2(), teql_master_xmit(), TLan_FreeLists(), TLan_HandleTxEOF(), TLan_StartTx(), tok_interrupt(), toshoboe_hard_xmit(), tr_tx(), tulip_close(), up1tr6(), vortex_close(), vortex_interrupt(), vortex_open(), vortex_start_xmit(), W6692_interrupt(), W6692_l1hw(), W6692B_interrupt(), w83977af_hard_xmit(), wanxl_destroy_ring(), wanxl_intr(), wanxl_xmit(), wavelan_packet_xmit(), write_raw(), x25_asy_data_transmit(), xpds_dlci_handle_status(), xpds_dlci_lmi_timer(), xpds_dlci_receive(), xpds_dlci_transmit(), yam_close(), yam_tx_byte(), z8530_tx_done(), and znet_send_packet().

#define HARDWARE   { HW_PI, HW_PI2, HW_TWIN }

Definition at line 116 of file dmascc.c.

#define HW_PI

Value: { "Ottawa PI", 0x300, 0x20, 0x10, 8, \ 0, 8, 1843200, 3686400 } Definition at line 109 of file dmascc.c.

#define HW_PI2

Value: { "Ottawa PI2", 0x300, 0x20, 0x10, 8, \ 0, 8, 3686400, 7372800 } Definition at line 111 of file dmascc.c.

#define HW_TWIN

Value: { "Gracilis PackeTwin", 0x200, 0x10, 0x10, 32, \ 0, 4, 6144000, 6144000 } Definition at line 113 of file dmascc.c.

#define MAX_NUM_DEVS   32

Definition at line 123 of file dmascc.c. Referenced by __initfunc().

#define MODULE_AUTHOR (  x   )

Definition at line 56 of file dmascc.c.

#define MODULE_DESCRIPTION (  x   )

Definition at line 57 of file dmascc.c.

#define MODULE_PARM (  x, y   )

Definition at line 58 of file dmascc.c.

#define NUM_RX_BUF   2

Definition at line 103 of file dmascc.c. Referenced by es_isr(), rx_bh(), and special_condition().

#define NUM_TX_BUF   2

Definition at line 102 of file dmascc.c. Referenced by es_isr(), and scc_send_packet().

#define NUM_TYPES   3

Definition at line 121 of file dmascc.c.

#define PI_DREQ_MASK   0x04

Definition at line 150 of file dmascc.c. Referenced by __initfunc(), rx_bh(), scc_close(), scc_isr(), scc_open(), and scc_send_packet().

#define register_netdevice (  x   )     register_netdev(x)

Definition at line 63 of file dmascc.c. Referenced by __initfunc(), arcnet_open(), bpq_new_device(), comx_mkdir(), hdlc_fr_pvc(), init_etherdev(), ipgre_tunnel_locate(), ipip6_tunnel_locate(), ipip_tunnel_locate(), irport_open(), irtty_open(), nsc_ircc_open(), register_hdlc_device(), register_netdev(), scc_net_setup(), slip_open(), toshoboe_open(), and w83977af_open().

#define RXFIFOH   0x08

Definition at line 71 of file dmascc.c. Referenced by scc_open().

#define SCCA_CMD   0x02

Definition at line 140 of file dmascc.c. Referenced by __initfunc(), and z8530_isr().

#define SCCA_DATA   0x03

Definition at line 141 of file dmascc.c. Referenced by __initfunc().

#define SCCB_CMD   0x00

Definition at line 138 of file dmascc.c. Referenced by __initfunc().

#define SCCB_DATA   0x01

Definition at line 139 of file dmascc.c. Referenced by __initfunc().

#define SET_DEV_INIT (  x   )     (x=dmascc_dev_init)

Definition at line 66 of file dmascc.c. Referenced by __initfunc().

#define SHDLCE   0x01

Definition at line 68 of file dmascc.c. Referenced by __initfunc(), init_channel(), and scc_open().

#define test_and_set_bit (  x, y   )     set_bit(x,y)

Definition at line 62 of file dmascc.c.

#define TMR_CNT0   0x00

Definition at line 144 of file dmascc.c. Referenced by __initfunc().

#define TMR_CNT1   0x01

Definition at line 145 of file dmascc.c. Referenced by __initfunc().

#define TMR_CNT2   0x02

Definition at line 146 of file dmascc.c. Referenced by __initfunc().

#define TMR_CTRL   0x03

Definition at line 147 of file dmascc.c. Referenced by __initfunc().

#define TWIN_CLR_TMR1   0x09

Definition at line 154 of file dmascc.c. Referenced by __initfunc(), and scc_isr().

#define TWIN_CLR_TMR2   0x0a

Definition at line 155 of file dmascc.c. Referenced by __initfunc(), and scc_isr().

#define TWIN_DMA_CFG   0x08

Definition at line 157 of file dmascc.c. Referenced by __initfunc(), es_isr(), scc_close(), and tm_isr().

#define TWIN_DMA_CLR_FF   0x0a

Definition at line 159 of file dmascc.c.

#define TWIN_DMA_FDX_T1R3   0x1d

Definition at line 186 of file dmascc.c.

#define TWIN_DMA_FDX_T3R1   0x1b

Definition at line 185 of file dmascc.c.

#define TWIN_DMA_HDX_R1   0x0a

Definition at line 182 of file dmascc.c. Referenced by es_isr().

#define TWIN_DMA_HDX_R3   0x16

Definition at line 184 of file dmascc.c. Referenced by es_isr().

#define TWIN_DMA_HDX_T1   0x08

Definition at line 181 of file dmascc.c. Referenced by tm_isr().

#define TWIN_DMA_HDX_T3   0x14

Definition at line 183 of file dmascc.c. Referenced by tm_isr().

#define TWIN_DTRA_ON   0x01

Definition at line 172 of file dmascc.c. Referenced by scc_close(), and scc_open().

#define TWIN_DTRB_ON   0x02

Definition at line 173 of file dmascc.c. Referenced by scc_close(), and scc_open().

#define TWIN_EI   0x80

Definition at line 178 of file dmascc.c. Referenced by __initfunc(), and scc_open().

#define TWIN_EXTCLKA   0x04

Definition at line 174 of file dmascc.c. Referenced by scc_open().

#define TWIN_EXTCLKB   0x08

Definition at line 175 of file dmascc.c. Referenced by scc_open().

#define TWIN_INT_MSK   0x07

Definition at line 169 of file dmascc.c. Referenced by scc_isr().

#define TWIN_INT_REG   0x08

Definition at line 153 of file dmascc.c. Referenced by scc_isr().

#define TWIN_LOOPA_ON   0x10

Definition at line 176 of file dmascc.c.

#define TWIN_LOOPB_ON   0x20

Definition at line 177 of file dmascc.c.

#define TWIN_SCC_MSK   0x01

Definition at line 166 of file dmascc.c. Referenced by scc_isr().

#define TWIN_SERIAL_CFG   0x09

Definition at line 158 of file dmascc.c. Referenced by __initfunc(), scc_close(), and scc_open().

#define TWIN_SPARE_1   0x0b

Definition at line 156 of file dmascc.c.

#define TWIN_SPARE_2   0x0b

Definition at line 160 of file dmascc.c.

#define TWIN_TMR1_MSK   0x02

Definition at line 167 of file dmascc.c. Referenced by scc_isr().

#define TWIN_TMR2_MSK   0x04

Definition at line 168 of file dmascc.c.

#define TX_ACTIVE   3

Definition at line 195 of file dmascc.c. Referenced by es_isr(), and tm_isr().

#define TX_IDLE   0

Definition at line 192 of file dmascc.c. Referenced by es_isr(), scc_open(), scc_send_packet(), and tm_isr().

#define TX_OFF   1

Definition at line 193 of file dmascc.c. Referenced by es_isr(), scc_set_param(), scc_stop_calibrate(), t_idle(), t_tail(), tm_isr(), yam_arbitrate(), and yam_tx_byte().

#define TX_SQDELAY   4

Definition at line 196 of file dmascc.c. Referenced by es_isr(), and tm_isr().

#define TX_TXDELAY   2

Definition at line 194 of file dmascc.c. Referenced by es_isr(), scc_send_packet(), and tm_isr().

#define TXFIFOE   0x20

Definition at line 72 of file dmascc.c. Referenced by scc_open().

#define TYPE_PI   0

Definition at line 118 of file dmascc.c. Referenced by __initfunc(), and scc_isr().

#define TYPE_PI2   1

Definition at line 119 of file dmascc.c. Referenced by __initfunc(), es_isr(), rx_bh(), scc_close(), scc_isr(), scc_open(), and scc_send_packet().

#define TYPE_TWIN   2

Definition at line 120 of file dmascc.c. Referenced by __initfunc(), es_isr(), scc_close(), scc_isr(), scc_open(), and tm_isr().

#define unregister_netdevice (  x   )     unregister_netdev(x)

Definition at line 64 of file dmascc.c. Referenced by __initfunc(), arcnet_close(), bpq_check_devices(), comx_mkdir(), destroy_pvc_list(), hdlc_fr_pvc(), ipgre_tunnel_ioctl(), ipip6_tunnel_ioctl(), ipip_tunnel_ioctl(), ipmr_new_tunnel(), irport_close(), irtty_close(), sl_alloc(), streamer_scan(), unregister_hdlc_device(), unregister_netdev(), vif_delete(), and w83977af_close().

#define Z85230   2

Definition at line 130 of file dmascc.c. Referenced by __initfunc(), es_isr(), scc_open(), z8530_flush_fifo(), z8530_init(), and z8530_tx_begin().

#define Z8530   0

Definition at line 128 of file dmascc.c. Referenced by __initfunc(), tm_isr(), and z8530_init().

#define Z85C30   1

Definition at line 129 of file dmascc.c. Referenced by __initfunc(), scc_open(), slvl_init(), sv11_init(), and z8530_init().

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Function Documentation

__initfunc (  int   setup_adapter(int io, int h, int n)  )

Definition at line 457 of file dmascc.c. References ARPHRD_AX25, ax25_encapsulate(), ax25_rebuild_header(), ax25_test, scc_param::brg_tc, scc_priv::channel, scc_info::chip, chip, CHIPNAMES, scc_param::clocks, scc_priv::cmd, CTSIE, tq_struct::data, scc_priv::data, scc_info::dev, dev, dev_init_buffers(), device, EXT_INT_ENAB, FHWRES, HZ, inb_p, scc_priv::info, irq, irqs, jiffies, kmalloc(), memcpy, memset, MIE, scc_priv::name, name, scc_info::next, NULL, NV, outb_p,